Prof. Tim CHENG Received Pan Wen Yuan Foundation Award for Outstanding Research

News 13 Jul 2020

Dean of Engineering Prof. Tim CHENG was honored with a Pan Wen Yuan Foundation Award for Outstanding Research in 2020 in recognition of his international contributions in very-large-scale integration (VLSI) testing and design verification, design automation of electronic and photonic systems, mobile computer vision, and learning-based multimedia computing. He is concurrently a Chair Professor jointly in the Departments of Electronic & Computer Engineering and Computer Science & Engineering.

The award is presented annually to no more than three outstanding ethnic Chinese researchers who specialize in the fields of electronics, information, and communication. Selection criteria include demonstration of international standards in theoretical innovations, experimental technique developments, production process enhancement or instrument production, as well as excellence in leading large-scale or integrative projects.

The Foundation was named after Dr. PAN Wen Yuen, the most memorable founder of Taiwan’s integrated circuit (IC) industry, and aims to promote the cultivation of technical manpower in information science. A number of awards were set up under the Foundation to recognize outstanding contributors in Taiwan’s technology industry.

Prof. Cheng joined HKUST as the Dean of Engineering in 2016 after a 23-year career at the University of California, Santa Barbara. He has made significant contributions in electronic design automation (EDA), and is one of the most impactful researchers globally in both testing and design verification/validation. His contributions in test and verification represent a sustained level of innovations driving the evolution of VLSI test and verification technologies over a span of three decades. A number of his inventions have been adopted in commercial tools and deployed commercially with high impact to the IC design industry.

His work has addressed the challenges of ensuring correctness and reliability of complex integrated circuits. He has developed a number of techniques that have led to the availability of low-cost and high-quality solutions for design validation and manufacturing testing of high-performance silicon ICs as well as flexible electronics. Among the most significant and impactful results he has produced include design-for-testability (DfT) and delay testing for high-performance electronics systems, logic equivalence checking for functional verification, validation and test for high-speed IOs, and a design style for designing low-power and robust flexible circuits, named “Pseudo-CMOS”, becoming the most commonly used design style for designing flexible circuits.